Photodiodes generate current after receiving light. They are widely used as light-receiving elements for optical pickup devices incorporated into optical disc devices, such as CD or DVD devices. A photodiode is constituted by a semiconductor with pn junctions. A reverse bias is applied to the pn junction to widen the depletion layer, and a high electric field is applied. Electron-hole pairs are generated by the absorbed light in the depletion layer. Under the attraction of the electric field, the electrons move to the n-type semiconductor region, while the holes move to the p−-type semiconductor region to form a current.
Types of photodiodes include PIN photodiodes, which have a p−-layer or n−-layer or other intrinsic layer (referred to as Layer I hereinafter) containing electroconductive impurity at low concentration between the p layer and n layer and can easily widen the depletion layer at a low voltage, and avalanche photodiode having a region where avalanche decay occurs.
Japanese Kokai Patent Application No. 2001-320079 discloses a photodiode manufacturing method that can be used to remove the insulation film on the top layer of the diode without having film peel-off or leakage.
The photodiode formed by the aforementioned method is shown in FIG. 26(A), which is a plan view, and FIG. 26(B), which is the cross-sectional view shown in FIG. 26(A).
For example, p−-type epitaxial layer 101 is formed as Layer I on p++-type silicon semiconductor substrate 100, and n-type epitaxial layer 102 is formed on it to form a pn junction. Also, n+-type semiconductor region 103 is formed in the surface layer part of n-type epitaxial layer 102 in the PIN photodiode region. Silicon nitride layer 103a is formed on the surface in the central part of n+-type semiconductor region 103. Silicide layer 103b made of platinum silicide, etc., is formed near the edge of n+-type semiconductor region 103 in the outer periphery of silicon nitride layer 103a. Silicon nitride layer 103a and silicide layer 103b have a film thickness of, for example, 30 nm. Also, LOCOS element-separating insulation film 104 is formed to surround PIN photodiode region.
A ring-shaped mask layer 105 made of a metal layer is formed from n+-type semiconductor region 103 in the outer periphery of the PIN photodiode to element-separating insulation film 104, and an interlayer insulation film 106 is formed on the mask layer. An opening part H is formed on interlayer insulation film 106 along the inner periphery of metal layer 105 to expose the surface of silicon nitride layer 103a and silicide layer 103b on n+-type semiconductor region 103 in the photodiode region. A surface protective layer 108 is formed to cover opening part H.
In this way, a PIN photodiode PD with the aforementioned configuration is formed.
In the PIN photodiode with the aforementioned configuration, when a reverse bias is applied to n+-type semiconductor region 103 and p− type epitaxial layer 101, the depletion layer is widened from the pn junction surface. When light is incident on the formed depletion layer, electron hole pairs are generated, and optical signals are obtained.
In this case, mask layer 105 is connected to n+ semiconductor region 103, and voltage can be applied to n+-type semiconductor region 103 via mask layer 105.
In the following, the method of forming the aforementioned PIN photodiode PD will be explained.
As shown in the FIG. 27(A) and FIG. 27(B), p-type epitaxial layer 101 and n-type epitaxial layer 102 as Layer I are formed on p++-type silicon semiconductor substrate 100, and element separation is performed using LOCOS element-separating insulation film 104, etc., n+-type semiconductor region 103 is formed by means of ion injection in the surface layer part of n-type epitaxial layer 102 in the PIN photodiode region separated by LOCOS element-separating insulation film 104. Also, silicon nitride layer 103a with a thickness of about 30 nm is formed on the surface in the central part of n+-type semiconductor region 103. With silicon nitride layer 103a having silicide masking function used as a mask, silicide layer 103b made of platinum silicide, etc., and having a thickness of about 30 nm is formed on the surface near the edge of n+-type semiconductor region 103 in the outer periphery of silicon nitride layer 103a. 
Then, a metal layer made of TiW, etc., is deposited in a thickness of 200-300 nm by means of sputtering, followed by patterning to form mask layer 105 that covers n+-type semiconductor region 103 and is extended all the way to LOCOS element-separating insulation film 104.
Then, insulation film 106 is formed on the entire surface of mask layer 105. In this case, insulation film 106 is formed by laminating plural layers by depositing silicon oxide by CVD with TEOS used as the raw material, or by depositing a BPSG film, or by depositing silicon nitride via CVD.
Then, as shown FIG. 28(A) and FIG. 28(B), a resist film 107 with a pattern that opens the photosensitive region of the photodiode is formed on insulation film 106. After that, dry etching, such as RIE (reactive ion etching), is performed with mask layer 105 serving as the etching stopper to eliminate the insulation film 106 on the aforementioned photosensitive region to form opening part H.
Then, as shown in FIG. 29(A) and FIG. 29(B), mask layer 105 in the area exposed in opening part H is removed selectively with respect to n+-type semiconductor region 103 and insulation film 106 by means of wet etching to expose n+-type semiconductor region 103.
Then, surface protective layer 108 is formed on the entire surface to obtain the semiconductor device having the PIN photodiode shown in FIG. 26(A) and FIG. 26(B).
In the method of manufacturing a semiconductor device having the aforementioned PIN photodiode, when removing the insulation film 106 from the diode, since mask layer 105 serves as an etching stopper, even if dry etching is used so that no hollow parts are formed on the inner wall surface of opening part H to cause film peeling, no damage that could allow leakage will be caused because the silicon substrate is protected by mask layer 105 in that step.
Also, when eliminating mask layer 105 exposed in the aforementioned opening part H, even if wet etching is used to avoid damage to the silicon substrate, mask layer 105 can be removed selectively without forming hollow parts on the inner wall surface of opening part H of insulation film 106.
However, when the aforementioned photodiode is used as a light-receiving element for an optical pickup device incorporated into a CD, DVD, or other optical disc device, in order to obtain the tracking error signal or focus error signal from the signal fed back from the optical disc, it is necessary to use PDIC formed by combining plural photodiodes.
FIG. 30 is the plan view of a PDIC formed by combining, for example, 4 PIN photodiodes. This figure shows how laser spot S, which is the signal fed back from the optical disc, is incident to the four PIN photodiodes PD1-4.
In this case, laser spot S is incident to target the center of the four PIN photodiodes PD1-4. However, since the part in the intervals between the four PIN photodiodes PD1-4 becomes a dead area, it is desirable to reduce the intervals between the four PIN photodiodes PD1-4 to, for example, 5 μm or less in order to increase the sensitivity.
FIG. 31 is a plan view illustrating the light-receiving surfaces of the photodiodes when the method described in the above-referenced Japanese patent application is applied to the four PIN photodiodes PD1-4 with the intervals reduced to about 5 μm as described above.
The four PIN photodiodes PD1-4 are covered by a common mask layer 110. After the opening part is formed in the insulation film, the mask layer in the opening part is removed. In this case, however, mask layer 110, which is a common conductive layer, is connected to the n+-type semiconductor region equivalent to the light-receiving surface of each of the four PIN photodiodes PD1-4. As a result, a short circuit between the diodes becomes a problem.
FIG. 32 is a plan view illustrating the light-receiving surface of a photodiode in the case when the mask layers are formed independently, and the four PIN photodiodes PD1-4 with an opening part formed in each of them can be laid out as close to each other as possible.
Independent mask layers (111-114) are formed with respect to the four PIN photodiodes PD1-4, respectively.
In this layout, however, the intervals between the four PIN photodiodes PD1-4 are increased to 20 μm, making it difficult to use them as the light-receiving element of an optical pickup device.